In this chapter, we address the limitations of device scaling imposed by the subthreshold value restriction of 60mV/decade in the CMOS VLSI design. The focus of current research primarily revolves around effective power methods for cutting-edge electronic devices with additional attributes. Instead of conventional homo-junction MOS devices, our investigation explores the utilization of heterojunctions with SiGe and Ge as these materials have a lower bandgap. By employing a Heterojunction Tunneling Field Effect Transistor (HTFET), we demonstrate a reduction in the subthreshold swing value and achieve low leakage current. We present a revolutionary HTFET design with Gate Oxide Overlap onto Source (GOS) to improve the futuristic features of low-power devices for ultra-low-power memory applications. We implement both n-type and p-type GOS HTFETs, contributing to energy-efficient SRAM cells, by combining low bandgap materials such as SiGe or Ge with high-k dielectrics. The suggested devices show large improvements in Miller capacitance together with a noteworthy decrease in subthreshold swing, high current ratios from ON to OFF, and an increased drive current proportion in the ON state. Expanding the application scope, the proposed device is integrated into a radiation-hardened 14T SRAM cell, showcasing superior performance compared to traditional designs. Memory activities are accelerated, and the chapter concludes with a comparative power and delay analysis of HTFETs-based SRAM cells.
Keywords: BTBT, heterojunctions, TFETs, subthreshold swing, SiGe/Ge HTFETs, 14T SRAM.
