Nano-FET Devices: Miniaturization, Simulation, and Applications (Part 1)

Novel Tunnel Field Effect Transistors

Author(s): P. Suveetha Dhanaselvam*, B. Karthikeyan, K. M. D Sridharshan and C. Muthu Pandian

Pp: 167-194 (28)

DOI: 10.2174/9789815313802125010009

* (Excluding Mailing and Handling)

Abstract

This research aims to explore the complex challenges regarding reliability and scalability in Heterojunction Dual Gate Vertical Tunnel Field Effect Transistors (HJDGV-TFET). Specifically, it focuses on comparing the hetero buried and stacked buried configurations. The study thoroughly examines factors affecting reliability, such as traps, noise susceptibility, lateral straggle, self-heating, and scalability effects. These factors collectively impact the performance and lifespan of advanced electronic devices. Through extensive simulations under different operational conditions, this investigation quantifies and compares the influence of these reliability issues in both configurations. Additionally, the study delves into how HJ-DGV-TFETs maintain their reliability as technology continues to scale down.


Keywords: Hetero buried oxide, HJ-DGV-TFET, Noise, Oxide thickness, Stacked buried oxide, Source doping, Traps, Temperature variations.

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