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Nanoscience & Nanotechnology-Asia

Editor-in-Chief

ISSN (Print): 2210-6812
ISSN (Online): 2210-6820

Research Article

Design and Analyze the Effect of Hetero Material and Dielectric on TFET with Dual Work Function Engineering

Author(s): Vimala Palanichamy* and Arun Samuel Thankamony Sarasam

Volume 14, Issue 1, 2024

Published on: 24 January, 2024

Article ID: e240124226161 Pages: 10

DOI: 10.2174/0122106812279723231224172041

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Abstract

Background: As the size of the field effect transistors is reduced down to nanometers, the performance of the devices is affected by various short-channel effects. To overcome these effects, various novel devices are used. Tunnel Field Effect Transistors (TFET) are novel devices in which the drain current needs to be improved. Gate engineering and III-V compound materials are proposed to improve the ON current and reduce the leakage current along with its ambipolar behaviour.

Methods: The proposed device structure is designed with a heterojunction hetero dielectric dual material gate Tunnel Field Effect Transistor incorporating various combinations of III-V compound materials such as AlGaAsSb/InGaAs, InGaAs/Ge, InGaAs/InP and SiGe/Si. As in III-V composite materials like AlGaAsSb/InGaAs, the narrower bandgap at the source channel interface helps to improve the electric field across the junction. At the same time, the wider bandgap at the channel drain junction leads to unidirectional current flow, resulting in ambipolar reduction. 2D TCAD simulation is used to obtain the electrical parameters for Hetero junction TFETs and the comparison analysis of different Hetero device structures.

Results: The device's electrical parameters, such as energy band diagram, current density, electric field, drain current, gate capacitance and transconductance, have been simulated and analyzed. Besides, the dual material used in the gate, such as Metal1 (M1) and Metal2 (M2), along with HfO2/SiO2 stacked dielectric, helps improve the gate controllability over the channel and the leakage current reduction.

Conclusion: An ION=10-1A/μm, IOFF = 10-12A/μm at drive voltage 0.5V is obtained for InGaAs/InP layer at the source channel hetero junction TFET, and ION=10-2A/μm, IOFF =10-14A/μm at drive voltage 0.5V is obtained for SiGe/Si layer at the source channel hetero junction TFET. Therefore, the InGaAs/InP and SiGe/Si layer TFET are more suitable for ultra-low power integrated circuits.

Keywords: Hetero junction, hetero stacked dielectric, tunnel field effect transistors, drain current, transconductance, MOS transistors.

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